Co-verification-of hardware and software, a unified approach in verification

A co-verification method and system are described herein. The co-verification method is able to verify software and hardware at the same time. Constraints are provided to a software compiler which generates programming values. The programming values and stimulus from a verification test bench are ut...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: BALAN MOHAN, KRISHNAMOORTHY HARISH, SIVA NIMALAN, ATREYA KISHORE BADARI
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A co-verification method and system are described herein. The co-verification method is able to verify software and hardware at the same time. Constraints are provided to a software compiler which generates programming values. The programming values and stimulus from a verification test bench are utilized to test a design such as a microprocessor.