System and method for estimating spatial characteristics of integrated circuits

Methods of the present disclosure can include a method for estimating a spatial characteristic of an integrated circuit (IC), the method comprising: calculating a correlation between a dimension of a photoresist layer and exposure to a scanning electron microscope (SEM) for at least one reference IC...

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Bibliographische Detailangaben
Hauptverfasser:	ZHANG YUNLIN, KAGALWALA TAHER E, RANA NARENDER
Format:	Patent
Sprache:	eng
Schlagworte:	APPLICATIONS OF SCANNING-PROBE TECHNIQUES, e.g. SCANNING PROBEMICROSCOPY [SPM] BASIC ELECTRIC ELEMENTS CALCULATING COMPUTING COUNTING ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS ELECTRICITY HANDLING RECORD CARRIERS IMAGE DATA PROCESSING OR GENERATION, IN GENERAL INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIRCHEMICAL OR PHYSICAL PROPERTIES MEASURING PHYSICS PRESENTATION OF DATA RECOGNITION OF DATA RECORD CARRIERS SCANNING-PROBE TECHNIQUES OR APPARATUS TESTING
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Beschreibung
Zusammenfassung:	Methods of the present disclosure can include a method for estimating a spatial characteristic of an integrated circuit (IC), the method comprising: calculating a correlation between a dimension of a photoresist layer and exposure to a scanning electron microscope (SEM) for at least one reference IC pattern in the photoresist layer, the correlation providing a relationship between the dimension of the photoresist and the spatial characteristic, wherein the calculating is based on: an SEM image of the at least one reference IC pattern produced from reducing the dimension of the photoresist layer with the SEM from an initial value to a reduced value, the initial value of the dimension, and the reduced value of the dimension; and estimating the spatial characteristic of a target IC based on the correlation.