Latency detection in a memory built-in self-test by using a ping signal

In a complex semiconductor device including embedded memories, the round trip latency may be determined during a memory self-test by applying a ping signal having the same latency as control and failure signals used during the self-test. The ping signal may be used for controlling an operation count...

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Bibliographische Detailangaben
Hauptverfasser: PERIYACHERI SURESH, HESSE KAY
Format: Patent
Sprache:eng
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Zusammenfassung:In a complex semiconductor device including embedded memories, the round trip latency may be determined during a memory self-test by applying a ping signal having the same latency as control and failure signals used during the self-test. The ping signal may be used for controlling an operation counter in order to obtain a reliable correspondence between the counter value and a memory operation causing a specified memory failure.