Reference voltage modification in a memory device

A method and apparatus for modifying a reference voltage between refreshes in a memory device are disclosed. The memory array may include a plurality of memory cells. The memory device may also include a sense amplifier. The sense amplifier may be configured to read data from the plurality of memory...

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Bibliographische Detailangaben
Hauptverfasser: KIM KYU-HYOUN, SABROWSKI JEFFREY A, CORDERO EDGAR R, HENDERSON JOAB D, SAETOW ANUWAT
Format: Patent
Sprache:eng
Schlagworte:
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Zusammenfassung:A method and apparatus for modifying a reference voltage between refreshes in a memory device are disclosed. The memory array may include a plurality of memory cells. The memory device may also include a sense amplifier. The sense amplifier may be configured to read data from the plurality of memory cells using a reference voltage. The memory device may also include a sense amplifier reference voltage modification circuit. The sense amplifier reference voltage modification circuit may be configured to detect a triggering event and modify the reference voltage in response to detecting a triggering event.