Low latency communication via memory windows

A high performance computer system has compute nodes interconnected by an inter-node communication network. The compute nodes include local packetized interconnects. Shared memory between compute nodes is emulated by tunneling packetized interconnect packets between the compute nodes. A memory regio...

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Bibliographische Detailangaben
Hauptverfasser: REINHARD WALTER JAMES, GORODETSKY IGOR
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A high performance computer system has compute nodes interconnected by an inter-node communication network. The compute nodes include local packetized interconnects. Shared memory between compute nodes is emulated by tunneling packetized interconnect packets between the compute nodes. A memory region on one of the compute nodes is used as a window into a memory region in another compute node. Special registers may be provided to expedite remote operations on small amounts of data.