Delta-sigma modulator

Provided is a delta-sigma modulator including a summer summing an input signal and an analog signal, a first integrator integrating an output signal from the summer and outputting a first integration signal, a second integrator integrating the first integration signal and outputting a second integration signal, a comparator comparing the second integration signal and a reference signal and outputting a digital signal according to the comparison result, and a digital-to-analog converter converting the digital signal into an analog signal in response to a clock signal and outputting the converted analog signal, wherein the second integrator operates based on an Nth order (where N is natural number of 1 or greater) transfer function.