Adaptive rate control of 10GBASE-T data transport system

A 10GBASE-T circuit is disclosed. The circuit includes a physical (PHY) integrated circuit and a media access control (MAC) integrated circuit. The PHY couples to a data transfer medium and carries out data transfers at a PHY data rate. The MAC integrated circuit controls access to the date transfer medium and couples to the PHY via a bidirectional link operating at a MAC data rate. Rate control logic detects the PHY data rate, and adjusts the MAC data rate to the PHY data rate. Changes to the PHY and MAC data rates may be made at rates higher than 1 Gbps.