Chip package and manufacturing method thereof

A chip package includes a substrate having an upper and a lower surface and including: at least a first contact pad; a non-optical sensor chip disposed overlying the upper surface, wherein the non-optical sensor chip includes at least a second contact pad and has a first length; a protective cap dis...

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Bibliographische Detailangaben
Hauptverfasser:	CHANG SHU-MING, PERNG BAWING, WEN YING-NAN
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY MICROSTRUCTURAL TECHNOLOGY PERFORMING OPERATIONS PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTUREOR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS SEMICONDUCTOR DEVICES TRANSPORTING
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Beschreibung
Zusammenfassung:	A chip package includes a substrate having an upper and a lower surface and including: at least a first contact pad; a non-optical sensor chip disposed overlying the upper surface, wherein the non-optical sensor chip includes at least a second contact pad and has a first length; a protective cap disposed overlying the non-optical sensor chip, wherein the protective cap has a second length, an extending direction of the second length is substantially parallel to that of the first length, and the second length is shorter than the first length; an IC chip disposed overlying the protective cap, wherein the IC chip includes at least a third contact pad and has a third length, and an extending direction of the third length is substantially parallel to that of the first length; and bonding wires forming electrical connections between the substrate, the non-optical sensor chip, and the IC chip.