Limiting circuit for a semiconductor transistor and method for limiting the voltage across a semiconductor transistor

A limiting circuit for at least one semiconductor transistor. The circuit includes a limiting path which is coupled between a first power terminal and a second power terminal of the semiconductor transistor. The limiting path includes a limiting transistor. A node of the limiting path located between the limiting transistor and the second power terminal of the semiconductor transistor is coupled to a control terminal of the semiconductor transistor. A voltage source is coupled to the control terminal of the limiting transistor and is designed to apply a control voltage to said control terminal of the limiting transistor. The control voltage corresponds to a critical voltage for the voltage between the first power terminal and the second power terminal of the semiconductor transistor. The limiting transistor is switched to a conductive state when said critical voltage is exceeded at a power terminal of said limiting transistor.