Switch having dedicated stacking link
A first switch includes a processor and a memory communicatively coupled to the processor. The memory stores instructions causing the processor, after execution of the instructions by the processor, to establish a first stacking link between a first stacking port of the first switch and a first stac...
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| Zusammenfassung: | A first switch includes a processor and a memory communicatively coupled to the processor. The memory stores instructions causing the processor, after execution of the instructions by the processor, to establish a first stacking link between a first stacking port of the first switch and a first stacking port of a second switch, establish a second stacking link between a second stacking port of the first switch and a first stacking port of a third switch, and dedicate the first stacking link to a first class of traffic between the first switch and the second switch. |
|---|