Method of fabricating semiconductor package
This disclosure provides a semiconductor package and a method of fabricating the same. The semiconductor package includes an insulating layer; a plurality of traces and connection pads disposed in the insulating layer and protruded from the insulating layer; a plurality of bumps formed on the plural...
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| creator | TSAI YUEH-YING CHEN YONG-LIANG LIN PANGUN |
| description | This disclosure provides a semiconductor package and a method of fabricating the same. The semiconductor package includes an insulating layer; a plurality of traces and connection pads disposed in the insulating layer and protruded from the insulating layer; a plurality of bumps formed on the plurality of traces; a semiconductor chip disposed on the bumps; and an encapsulant formed on the insulating layer to encapsulate the semiconductor chip, the plurality of bumps, traces and connection pads. When the encapsulant is formed, voids can be prevented from being generated in the traces and the connection pads and thus the yield of process is significantly increased. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9029203B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9029203B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9029203B23</originalsourceid><addsrcrecordid>eNrjZND2TS3JyE9RyE9TSEtMKspMTizJzEtXKE7NzUzOz0spTS7JL1IoSEzOTkxP5WFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcVAVal5qSXxocGWBkaWRgbGTkbGRCgBACNaKVE</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method of fabricating semiconductor package</title><source>esp@cenet</source><creator>TSAI YUEH-YING ; CHEN YONG-LIANG ; LIN PANGUN</creator><creatorcontrib>TSAI YUEH-YING ; CHEN YONG-LIANG ; LIN PANGUN</creatorcontrib><description>This disclosure provides a semiconductor package and a method of fabricating the same. The semiconductor package includes an insulating layer; a plurality of traces and connection pads disposed in the insulating layer and protruded from the insulating layer; a plurality of bumps formed on the plurality of traces; a semiconductor chip disposed on the bumps; and an encapsulant formed on the insulating layer to encapsulate the semiconductor chip, the plurality of bumps, traces and connection pads. When the encapsulant is formed, voids can be prevented from being generated in the traces and the connection pads and thus the yield of process is significantly increased.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20150512&DB=EPODOC&CC=US&NR=9029203B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20150512&DB=EPODOC&CC=US&NR=9029203B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>TSAI YUEH-YING</creatorcontrib><creatorcontrib>CHEN YONG-LIANG</creatorcontrib><creatorcontrib>LIN PANGUN</creatorcontrib><title>Method of fabricating semiconductor package</title><description>This disclosure provides a semiconductor package and a method of fabricating the same. The semiconductor package includes an insulating layer; a plurality of traces and connection pads disposed in the insulating layer and protruded from the insulating layer; a plurality of bumps formed on the plurality of traces; a semiconductor chip disposed on the bumps; and an encapsulant formed on the insulating layer to encapsulate the semiconductor chip, the plurality of bumps, traces and connection pads. When the encapsulant is formed, voids can be prevented from being generated in the traces and the connection pads and thus the yield of process is significantly increased.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZND2TS3JyE9RyE9TSEtMKspMTizJzEtXKE7NzUzOz0spTS7JL1IoSEzOTkxP5WFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcVAVal5qSXxocGWBkaWRgbGTkbGRCgBACNaKVE</recordid><startdate>20150512</startdate><enddate>20150512</enddate><creator>TSAI YUEH-YING</creator><creator>CHEN YONG-LIANG</creator><creator>LIN PANGUN</creator><scope>EVB</scope></search><sort><creationdate>20150512</creationdate><title>Method of fabricating semiconductor package</title><author>TSAI YUEH-YING ; CHEN YONG-LIANG ; LIN PANGUN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9029203B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2015</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>TSAI YUEH-YING</creatorcontrib><creatorcontrib>CHEN YONG-LIANG</creatorcontrib><creatorcontrib>LIN PANGUN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>TSAI YUEH-YING</au><au>CHEN YONG-LIANG</au><au>LIN PANGUN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method of fabricating semiconductor package</title><date>2015-05-12</date><risdate>2015</risdate><abstract>This disclosure provides a semiconductor package and a method of fabricating the same. The semiconductor package includes an insulating layer; a plurality of traces and connection pads disposed in the insulating layer and protruded from the insulating layer; a plurality of bumps formed on the plurality of traces; a semiconductor chip disposed on the bumps; and an encapsulant formed on the insulating layer to encapsulate the semiconductor chip, the plurality of bumps, traces and connection pads. When the encapsulant is formed, voids can be prevented from being generated in the traces and the connection pads and thus the yield of process is significantly increased.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Method of fabricating semiconductor package |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-23T16%3A48%3A18IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=TSAI%20YUEH-YING&rft.date=2015-05-12&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS9029203B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |