Warpage management for fan-out mold packaged integrated circuit

An integrated circuit includes a stacked conductive layer interposer and a first die at least partially encapsulated in a mold material. The first die is mechanically and electrically attached to a top surface of the stacked conductive layer interposer using solder bumps. The integrated circuit furt...

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Bibliographische Detailangaben
Hauptverfasser: WU PAUL Y, KWON WOON-SEONG, NACHNANI MANOJ, RAMALINGAM SURESH
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:An integrated circuit includes a stacked conductive layer interposer and a first die at least partially encapsulated in a mold material. The first die is mechanically and electrically attached to a top surface of the stacked conductive layer interposer using solder bumps. The integrated circuit further includes a first warpage correction layer.