Chip stack with electrically insulating walls
A method of forming a chip stack is provided and includes arraying solder pads along a plane of a major surface of a substrate forming walls of electrically insulating material between adjacent ones of the solder pads.
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | A method of forming a chip stack is provided and includes arraying solder pads along a plane of a major surface of a substrate forming walls of electrically insulating material between adjacent ones of the solder pads. |
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