Semiconductor device and methods of manufacturing

Semiconductor device and methods of manufacturing

A semiconductor device includes polysilicon layer and a metal silicide layer. The polysilicon layer is doped with carbon or phosphorous. The silicide layer is formed over the polysilicon layer.

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: SHIEH JUNG-YU, LIN YUMIN, KO ZONG-JIE, LIAO JENG HWA, JHANG PEI-CI
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator SHIEH JUNG-YU
LIN YUMIN
KO ZONG-JIE
LIAO JENG HWA
JHANG PEI-CI
description A semiconductor device includes polysilicon layer and a metal silicide layer. The polysilicon layer is doped with carbon or phosphorous. The silicide layer is formed over the polysilicon layer.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8969946B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8969946B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8969946B23</originalsourceid><addsrcrecordid>eNrjZDAMTs3NTM7PSylNLskvUkhJLctMTlVIzEtRyE0tychPKVbIT1PITcwrTUtMLiktysxL52FgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8aHBFpZmlpYmZk5GxkQoAQBrJSvv</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device and methods of manufacturing</title><source>esp@cenet</source><creator>SHIEH JUNG-YU ; LIN YUMIN ; KO ZONG-JIE ; LIAO JENG HWA ; JHANG PEI-CI</creator><creatorcontrib>SHIEH JUNG-YU ; LIN YUMIN ; KO ZONG-JIE ; LIAO JENG HWA ; JHANG PEI-CI</creatorcontrib><description>A semiconductor device includes polysilicon layer and a metal silicide layer. The polysilicon layer is doped with carbon or phosphorous. The silicide layer is formed over the polysilicon layer.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20150303&amp;DB=EPODOC&amp;CC=US&amp;NR=8969946B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20150303&amp;DB=EPODOC&amp;CC=US&amp;NR=8969946B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SHIEH JUNG-YU</creatorcontrib><creatorcontrib>LIN YUMIN</creatorcontrib><creatorcontrib>KO ZONG-JIE</creatorcontrib><creatorcontrib>LIAO JENG HWA</creatorcontrib><creatorcontrib>JHANG PEI-CI</creatorcontrib><title>Semiconductor device and methods of manufacturing</title><description>A semiconductor device includes polysilicon layer and a metal silicide layer. The polysilicon layer is doped with carbon or phosphorous. The silicide layer is formed over the polysilicon layer.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAMTs3NTM7PSylNLskvUkhJLctMTlVIzEtRyE0tychPKVbIT1PITcwrTUtMLiktysxL52FgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8aHBFpZmlpYmZk5GxkQoAQBrJSvv</recordid><startdate>20150303</startdate><enddate>20150303</enddate><creator>SHIEH JUNG-YU</creator><creator>LIN YUMIN</creator><creator>KO ZONG-JIE</creator><creator>LIAO JENG HWA</creator><creator>JHANG PEI-CI</creator><scope>EVB</scope></search><sort><creationdate>20150303</creationdate><title>Semiconductor device and methods of manufacturing</title><author>SHIEH JUNG-YU ; LIN YUMIN ; KO ZONG-JIE ; LIAO JENG HWA ; JHANG PEI-CI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8969946B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2015</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>SHIEH JUNG-YU</creatorcontrib><creatorcontrib>LIN YUMIN</creatorcontrib><creatorcontrib>KO ZONG-JIE</creatorcontrib><creatorcontrib>LIAO JENG HWA</creatorcontrib><creatorcontrib>JHANG PEI-CI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SHIEH JUNG-YU</au><au>LIN YUMIN</au><au>KO ZONG-JIE</au><au>LIAO JENG HWA</au><au>JHANG PEI-CI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device and methods of manufacturing</title><date>2015-03-03</date><risdate>2015</risdate><abstract>A semiconductor device includes polysilicon layer and a metal silicide layer. The polysilicon layer is doped with carbon or phosphorous. The silicide layer is formed over the polysilicon layer.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US8969946B2
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Semiconductor device and methods of manufacturing
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-27T07%3A13%3A01IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=SHIEH%20JUNG-YU&rft.date=2015-03-03&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS8969946B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true