Charge-discharge control circuit, semiconductor integrated circuit, method of controlling charging and discharging

A charge-discharge control circuit includes a cell balance detection circuit that detects that a voltage of a cell reaches a predetermined voltage; a memory circuit that stores the cell that reaches the predetermined voltage first among plural of the cells; bypass circuits respectively connected to the plural cells in parallel, each of the bypass circuits including a switch unit for bypassing the current that flows through the corresponding cell when charging; and a control circuit that controls the switch units, wherein the control circuit controls the switch unit based on the cell stored in the memory circuit so that an ON/OFF status of the switch unit is maintained from a start to an end of a next charging operation subsequent to a charging operation during which the cell is stored in the memory circuit.