System-level testcase generation

System-level testcase generation

A system-level testcase may be generated by performing system-level generation tasks by a system-level generator to produce an abstract testcase. Based upon the abstract testcase, one or more unit-level generators may generate the testcase. The testcase may be utilized in simulation of operation of...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: MORAD RONNY, GORYACHEV ALEX, BEN-YEHUDA SHIMON, COPTY SHADY, JABUSCH JOHN DAVID
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:A system-level testcase may be generated by performing system-level generation tasks by a system-level generator to produce an abstract testcase. Based upon the abstract testcase, one or more unit-level generators may generate the testcase. The testcase may be utilized in simulation of operation of a system-under-test (SUT). The testcase may be utilized for verification of the SUT. The SUT may comprise a plurality of units. The unit-level generator may be associated with units of the SUT and perform generation tasks associated with pertinent units.