Direct current circuit analysis based clock network design

A design tool with a direct current (DC) transformation analysis unit determines combinations of candidate sink locations for sector buffers within a sector of a clock network design. For each of the combination of candidate sink locations, the design tool transforms resistances of the sector with t...

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Bibliographische Detailangaben
Hauptverfasser: ALPERT CHARLES JAY, KOZHAYA JOSEPH NICOLAS, LI ZHUO, RESTLE PHILLIP JOHN, PALUMBO JOSEPH J, ZHOU YING, QIAN HAIFENG, SZE CHIN NGAI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A design tool with a direct current (DC) transformation analysis unit determines combinations of candidate sink locations for sector buffers within a sector of a clock network design. For each of the combination of candidate sink locations, the design tool transforms resistances of the sector with the combination of candidate sink locations into resistances of an electrical circuit. The design tool transforms capacitances of the sector with the combination of candidate sink locations into current sources of an electrical circuit. The design tool performs a DC circuit analysis, wherein results of the DC circuit analysis include a variance of voltage at nodes of the sector and a maximum value of current from currents flowing between pairs of the nodes of the sector. The design tool determines which of the combination of candidate sink locations has the minimum variance of voltage with the results of the DC circuit analysis.