Dual-damascene process to fabricate thick wire structure

A method and semiconductor device. In the method, at least one partial via is etched in a stacked structure and a border is formed about the at least one partial via. The method further includes performing thick wiring using selective etching while continuing via etching to at least one etch stop la...

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Bibliographische Detailangaben
Hauptverfasser: STAMPER ANTHONY K, DOWNES KEITH E, COOLBAUGH DOUGLAS D, LINDGREN PETER J
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A method and semiconductor device. In the method, at least one partial via is etched in a stacked structure and a border is formed about the at least one partial via. The method further includes performing thick wiring using selective etching while continuing via etching to at least one etch stop layer.