Coherence de-coupling buffer

A coherence decoupling buffer. In accordance with a first embodiment of the present invention, a coherence decoupling buffer is for storing tag information of cache lines evicted from a plurality of cache memories. A coherence decoupling buffer may be free of value information of the plurality of ca...

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Bibliographische Detailangaben
1. Verfasser: ROZAS GUILLERMO J
Format: Patent
Sprache:eng
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Zusammenfassung:A coherence decoupling buffer. In accordance with a first embodiment of the present invention, a coherence decoupling buffer is for storing tag information of cache lines evicted from a plurality of cache memories. A coherence decoupling buffer may be free of value information of the plurality of cache memories. A coherence decoupling buffer may also be combined with a coherence memory.