Method for validation of a graphically based executable control specification using model extraction

A system and method to hierarchically validate graphically based executable logic control specifications. The method may include performing an open loop validation of a feature of a plurality of features in the control specification, performing an open loop validation of the functional hierarchy of...

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Bibliographische Detailangaben
Hauptverfasser: UEDA KOICHI, FARNSWORTH JARED M, YAZAREL HAKAN
Format: Patent
Sprache:eng
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Zusammenfassung:A system and method to hierarchically validate graphically based executable logic control specifications. The method may include performing an open loop validation of a feature of a plurality of features in the control specification, performing an open loop validation of the functional hierarchy of an application of a plurality of applications in the graphically based logic control specification in response to completing successful validation of the plurality of features, performing a closed loop validation an ECU model of a plurality of ECUs modeled in the graphically based logic control specification in response to completing successful validation of the plurality of applications, and performing a closed loop validation of the plurality of ECUs modeled in response to completing successful validation of the ECU modeled.