Translational phase lock loop and synthesizer that eliminates dividers

This invention describes a method by which a low cost low phase noise Phase Locked Loop or Phase Locked Loop based. Frequency Synthesizer can be realized. The new method, called a Translational Phase Lock Loop or TPLL, allows the conversion of a traditional voltage controlled oscillator or VCO signal so that the phase noise of the VCO signal is substantially identical to the noise that the loop is aimed to correct via comparison to a low noise reference oscillator. It overcomes additional problems associated with traditional and prior art phase lock loops in terms of unwanted spurious signals, complexity, and cost.