Configurable delay circuitry with compensated delay

Configurable delay circuitry with compensated delay

An integrated circuit may include a delay circuit that receives an input signal at a first logic level and produces a delayed output signal at a second logic level at an output terminal. The integrated circuit may include a preset circuit coupled to the delay circuit. The preset circuit may receive...

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Bibliographische Detailangaben
Hauptverfasser: CHONG YAN, OOI EE MEI, SIA KET CHIEW, HUANG JOSEPH, AU KIN HONG
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS
RESONATORS
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Beschreibung
Zusammenfassung:An integrated circuit may include a delay circuit that receives an input signal at a first logic level and produces a delayed output signal at a second logic level at an output terminal. The integrated circuit may include a preset circuit coupled to the delay circuit. The preset circuit may receive the input signal and pre-drive the delayed output signal to an intermediate logic level that lies between the first and second logic levels.