Shift register and semiconductor display device

The invention provides a shift register which can operate normally while suppressing a delay of signal and a rounding of waveform. The shift register of the invention includes a plurality of stages of flip-flop circuits each of which includes a clocked inverter. The clocked inverter includes a first...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser:	OSAME MITSUAKI, ANZAI AYA
Format:	Patent
Sprache:	eng
Schlagworte:	ADVERTISING ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION CALCULATING COMPUTING COUNTING CRYPTOGRAPHY DEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH ISMODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THEDEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY,COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g.SWITCHING, GATING, MODULATING OR DEMODULATING DISPLAY EDUCATION ELECTRIC DIGITAL DATA PROCESSING FREQUENCY-CHANGING INFORMATION STORAGE NON-LINEAR OPTICS OPTICAL ANALOGUE/DIGITAL CONVERTERS OPTICAL LOGIC ELEMENTS OPTICS PHYSICS SEALS STATIC STORES TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF
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Beschreibung
Zusammenfassung:	The invention provides a shift register which can operate normally while suppressing a delay of signal and a rounding of waveform. The shift register of the invention includes a plurality of stages of flip-flop circuits each of which includes a clocked inverter. The clocked inverter includes a first transistor and a second transistor which are connected in series, a first compensation circuit including a third transistor and a fourth transistor which are connected in series, and a second compensation circuit including a fifth transistor and a transmission gate. According to the first compensation circuit, a timing at which a signal outputted from the flip-flop circuit rises or falls can be controlled in synchronization with an output of two stages before. The second compensation circuit can control a clock signal input can be controlled.