Vertical non-volatile memory device

A vertical non-volatile memory device includes a semiconductor pattern disposed on a substrate; and a plurality of transistors of first through n-th layers that are stacked on a side of the semiconductor pattern at predetermined distances from each other, wherein the transistors are spaced apart and...

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Bibliographische Detailangaben
Hauptverfasser: JANG KYUNG-TAE, LEE CHANG-WON, SHIN SEUNG-MOK
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A vertical non-volatile memory device includes a semiconductor pattern disposed on a substrate; and a plurality of transistors of first through n-th layers that are stacked on a side of the semiconductor pattern at predetermined distances from each other, wherein the transistors are spaced apart and insulated from one another at the predetermined distances via air gap, where n is a natural number equal to or greater than 2.