Semiconductor devices having lower and upper interconnection structures that exhibit reduced coupling
An interconnection structure for a semiconductor device may include lower interconnection patterns disposed in a checker board shape and upper interconnection patterns disposed in a checker board shape and connecting two adjacent lower interconnection patterns to each other.
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | An interconnection structure for a semiconductor device may include lower interconnection patterns disposed in a checker board shape and upper interconnection patterns disposed in a checker board shape and connecting two adjacent lower interconnection patterns to each other. |
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