Efficient and scalable cyclic redundancy check circuit using Galois-field arithmetic

Embodiments of the present disclosure describe methods, apparatus, and system configurations for cyclic redundancy check circuits using Galois-field arithmetic.

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Bibliographische Detailangaben
Hauptverfasser:	TAN SIN S, GOPAL VINODH, SCHMISSEUR MARK A, HAREN KENNETH C, BROWN THOMAS C, KUMAR PANKAJ, RADHAKRISHNAN SIVAKUMAR, FEGHALI WAJDI K
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY CALCULATING CODE CONVERSION IN GENERAL CODING COMPUTING COUNTING DECODING ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS
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Beschreibung
Zusammenfassung:	Embodiments of the present disclosure describe methods, apparatus, and system configurations for cyclic redundancy check circuits using Galois-field arithmetic.