Test structure for ILD void testing and contact resistance measurement in a semiconductor device

In complex semiconductor devices, the contact characteristics may be efficiently determined on the basis of a test structure which includes a combination of interconnect chain structures and a comb structure including gate electrode structures. Consequently, an increased amount of measurement inform...

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Hauptverfasser: UTESS DIRK, CHUMAKOV DMYTRO
Format: Patent
Sprache:eng
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Zusammenfassung:In complex semiconductor devices, the contact characteristics may be efficiently determined on the basis of a test structure which includes a combination of interconnect chain structures and a comb structure including gate electrode structures. Consequently, an increased amount of measurement information may be obtained on the basis of a reduced overall floor space of the test structure. In this manner, the complex manufacturing sequence for forming a contact level of a semiconductor device may be quantitatively estimated and monitored.