Residue isolation process in TFT LCD fabrication

A method is used to prevent unwanted electrical contacts between various electrically conducting surfaces and lines in a display panel due to an n+ a-Si residue and/or ITO debris. The method provides a clearing pattern including at least a cleared area in the passivation layer for preventing the residue or debris from locating at the cleared area. As such, if an n+ a-Si residue happens to be deposited under the passivation layer, the part of the residue located in the cleared area is removed by an a-Si selective etching process, for example. Furthermore, with the cleared area, ITO debris deposited on the section of the dielectric layer deposited on the signal line can be electrically isolated from the electrode.