Method to reduce threshold voltage variability with through gate well implant

The present disclosure provides a semiconductor device that may include a substrate including a semiconductor layer overlying an insulating layer. A gate structure that is present on a channel portion of the semiconductor layer. A first dopant region is present in the channel portion of the semicond...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: JOHNSON JEFFREY B, ERVIN JOSEPH, PARRIES PAUL C, WANG GENG
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:The present disclosure provides a semiconductor device that may include a substrate including a semiconductor layer overlying an insulating layer. A gate structure that is present on a channel portion of the semiconductor layer. A first dopant region is present in the channel portion of the semiconductor layer, in which the peak concentration of the first dopant region is present within the lower portion of the gate conductor and the upper portion of the semiconductor layer. A second dopant region is present in the channel portion of the semiconductor layer, in which the peak concentration of the second dopant region is present within the lower portion of the semiconductor layer.