Semiconductor device and manufacturing method therefor

A multilayer wiring substrate has an upper surface with multiple bonding leads and a lower surface with multiple lands. Multiple wiring layers and insulating layers are alternately formed on the upper surface side and on the lower surface side of the core material of the wiring substrate. The bonding leads are formed of part of the uppermost wiring layer and the lands are formed of part of the lowermost wiring layer. The insulating layers include second insulating layers containing fiber and resin and third insulating layers smaller in fiber content than the second insulating layers. The second insulating layers are formed on the upper and lower surface sides of the core material. The third insulating layers are formed on the upper and lower surface sides of the core material with the second insulating layers in-between. The uppermost and lowermost wiring layers are formed over the third insulating layers.