Nonvolatile semiconductor memory device

A nonvolatile semiconductor memory device according to one embodiment includes: a memory cell array; word lines each connected to nonvolatile memory cells; and a control circuit. When executing the data reading operation, the control circuit applies to a selected word line connected to a selected memory cell a first voltage obtained by adding a first adjusting voltage to an intermediate voltage between adjoining two of the threshold voltage distributions; applies to first non-selected word lines adjoining the selected word line a second voltage obtained by subtracting a second adjusting voltage from a reading pass voltage; applies to second non-selected word lines adjoining the first non-selected word lines a third voltage obtained by adding the second adjusting voltage to the reading pass voltage; and applies to third non-selected word lines, the third non-selected word lines being non-selected word lines except the first and second non-selected word lines, the reading pass voltage.