Oscillator architecture having fast response time with low current consumption and method for operating the oscillator architecture

An oscillator architecture and a method for powering up/down the oscillator architecture are described. In one embodiment, an oscillator architecture includes a reference generator configured to generate reference signals and an in-phase/quadrature (IQ) oscillator configured to generate oscillation...

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Bibliographische Detailangaben
Hauptverfasser: MAHOOTI KEVIN, GANDHI SANKET, TARNG MIN MING
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:An oscillator architecture and a method for powering up/down the oscillator architecture are described. In one embodiment, an oscillator architecture includes a reference generator configured to generate reference signals and an in-phase/quadrature (IQ) oscillator configured to generate oscillation signals based on the reference signals. The reference generator includes a distributed start-up circuitry that includes multiple start-up circuits. The IQ oscillator includes at least one turbo comparator having a low power functional mode and a turbo functional mode. Other embodiments are also described.