Retention voltage generation

An integrated circuit and method includes retention voltage generation circuitry which receives a supply voltage from a supply voltage node and provides a retention voltage. Functional circuitry is connected between the retention voltage node and a reference voltage node and is held in a data retention state when at least a minimum voltage is provided between the retention voltage node and the reference voltage node. Each of the circuits includes at least one p-type threshold device and at least one n-type threshold device, both having a characteristic threshold voltage. The p-type and n-type threshold devices are connected in parallel between the supply voltage node and the retention voltage node. A variation in the characteristic threshold voltage of either of the at least one p-type or the at least one n-type device maintains at least the minimum voltage between the retention voltage node and the reference voltage node.