Manufacturing test for a programmable integrated circuit implementing a specific user design

Methods and systems generate a manufacturing test of a programmable integrated circuit and optionally test the programmable integrated circuit with the manufacturing test. A netlist is generated that represents a specific user design implemented in programmable resources of the programmable integrated circuit. The netlist represents user registers that are implemented in a portion of the logic registers of the programmable logic resources. A virtual scan chain is added to the netlist. Scan-test vectors are generated from the netlist using automatic test pattern generation (ATPG). The scan-test vectors serially scan the portion of the logic registers via the virtual scan chain. The scan-test vectors are converted into access-test vectors that access the portion of the logic registers via a configuration port of the programmable integrated circuit. The programmable integrated circuit is optionally tested for a manufacturing defect with the access-test vectors.