Methods and structures for controlling wafer curvature

Methods and structures for controlling wafer curvature

Methods and structures for controlling wafer curvature during fabrication of integrated circuits caused by stressed films. The methods include controlling the conductor density of wiring levels, adding compensating stressed film layers and disturbing the continuity of stress films with the immediate...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: STAMPER ANTHONY KENDALL, VANSLETTE DANIEL SCOTT, MAXSON JEFFERY BURTON, FAYAZ MOHAMMED FAZIL
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS
SEMICONDUCTOR DEVICES
TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
TECHNICAL SUBJECTS COVERED BY FORMER USPC
TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ARTCOLLECTIONS [XRACs] AND DIGESTS
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Beschreibung
Zusammenfassung:Methods and structures for controlling wafer curvature during fabrication of integrated circuits caused by stressed films. The methods include controlling the conductor density of wiring levels, adding compensating stressed film layers and disturbing the continuity of stress films with the immediately lower layer. The structure includes integrated circuits having compensating stressed film layers.