Method and apparatus for performing interrupt coalescing

In one embodiment, the invention includes a controller that interrupts a CPU based on a counter that uses a decrement step which may increase as high priority data packets are received by the controller.

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	SENG LU CHIN, LEE KOK LIM PATRICK
Format:	Patent
Sprache:	eng
Schlagworte:	ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

Beschreibung
Zusammenfassung:	In one embodiment, the invention includes a controller that interrupts a CPU based on a counter that uses a decrement step which may increase as high priority data packets are received by the controller.