Multi-level DIMM error reduction

Embodiments of the present invention include computer-implemented methods for selectively applying remedial actions, according to a predefined order, for reducing the error rate in a computer memory system. In one embodiment, an ordered set of remedial actions are sequentially invoked in response to a single-bit error (SBE) in a DIMM reaching successive error thresholds. For example, in an air-cooled system, the remedial actions may include dynamically increasing a DIMM refresh rate, dynamically increasing a rate of airflow used to cool the DIMMs, and dynamically throttling the DIMMs. The remedial actions may be layered as they are successively invoked, to provide a cumulative remedial effect. At least two of the remedial actions may be simultaneously invoked in response to a multi-bit error rate reaching an associated threshold.