Direct memory access with striding across memory

A DMA device may include an offset determination unit configured to determine a first offset for a DMA transfer and a data transfer unit. The data transfer unit may be configured to receive a first buffer starting address identifying a starting location of a first buffer allocated in memory for the DMA transfer and to generate a first buffer offset address by applying the first offset to the first buffer starting address. The data transfer unit may be further configured to use the first buffer offset address as a starting location in the first buffer for data transferred in the DMA transfer. By applying various offsets, such DMA devices may spread memory access workload across multiple memory controllers, thereby achieving better workload balance and performance in the memory system.