Interface for managing multiple implementations of a functional block of a circuit design

Approaches for assembling an electronic circuit design. A processor performs operations including instantiating and coupling a plurality of instances of functional blocks in the design, including at least one meta block instance. The plurality of instances of functional blocks are displayed as respective graphical objects and identifiers of two or more implementations for the meta block instance from a meta block library are displayed. In response to designer selection of one implementation from the meta block library, a specification of the selected one implementation for the meta block instance is stored in association with the design. In response to designer selection of a graphical object corresponding to the at least one meta block instance, a designer-editable version of the one implementation is displayed. An updated specification of the one implementation associated with design is stored in response to designer modification of the designer-editable version of the one implementation.