Semiconductor memory device

A memory includes memory cells on a semiconductor layer, in which each of the memory cells includes a source layer and a drain layer in the semiconductor layer; an electrically floating body region provided in the semiconductor layer between the source layer and the drain layer and configured to acc...

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1. Verfasser: MINAMI YOSHIHIRO
Format: Patent
Sprache:eng
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Zusammenfassung:A memory includes memory cells on a semiconductor layer, in which each of the memory cells includes a source layer and a drain layer in the semiconductor layer; an electrically floating body region provided in the semiconductor layer between the source layer and the drain layer and configured to accumulate or discharge electric charges in order to store logical data; a gate dielectric film provided on the body region and comprising a ferroelectric film with polarization characteristics; and a gate electrode provided on the gate dielectric film above the body region, wherein each memory cell stores a plurality of logical data depending on an amount of electric charges accumulated in the body region and on a polarization state of the ferroelectric film.