Double anneal with improved reliability for dual contact etch stop liner scheme

A method for forming a device with both PFET and NFET transistors using a PFET compressive etch stop liner and a NFET tensile etch stop liner and two anneals in a deuterium containing atmosphere. The method comprises: providing a NFET transistor in a NFET region and a PFET transistor in a PFET regio...

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Bibliographische Detailangaben

Hauptverfasser:	FEN JAMIN F, LIM ENG HUA, LIN WENHE, LIM KHEE YONG, CHAN VICTOR
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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