System and method for simulating a semiconductor wafer prober and a class memory test handler

System and method for simulating a semiconductor wafer prober and a class memory test handler

A method runs a simulation. The method comprises receiving a selection of a device. The device is one of a prober used in wafer testing and a handler used in package testing. The method comprises receiving at least one parameter for a set of parameters for the simulation. The method comprises runnin...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser: GOLDSMITH LARRY IRA
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
STATIC STORES
TESTING
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Beschreibung
Zusammenfassung:A method runs a simulation. The method comprises receiving a selection of a device. The device is one of a prober used in wafer testing and a handler used in package testing. The method comprises receiving at least one parameter for a set of parameters for the simulation. The method comprises running the simulation by executing commands to be performed as if the device were present. A controller supplies the set of commands. Results from the simulation indicate a performance of the controller.