Satisfiability (SAT) based bounded model checkers

Satisfiability (SAT) based bounded model checkers

A method uses a SAT solver operating to cycle k to find bugs in a model having finite computation paths therein, wherein said bugs are on computation paths of less than length k. Another method includes adding an additional state variable to a model to be checked, where a governing state machine of...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: SHACHAM OHAD, GEIST DANIEL, LUSTIG YOAD, RABINOVITZ ISHAI, GINZBURG MARK, TZOREF RACHEL
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:A method uses a SAT solver operating to cycle k to find bugs in a model having finite computation paths therein, wherein said bugs are on computation paths of less than length k. Another method includes adding an additional state variable to a model to be checked, where a governing state machine of the additional variable has a "sink" state. The method includes having a translation using the additional variable whenever a state indicates a bad state and performing satisfiability solving with the model and the translation.