Comparator circuit having latching behavior and digital output sensors therefrom

A digital output sensor (110) includes a sensing structure (105) including at least one sensing element. The sensing structure (105) outputs a differential sensing signal (106, 107). An integrated circuit (100) includes a substrate (101) including signal conditioning circuitry for conditioning the sensing signal (106, 107). The signal conditioning circuitry includes a differential amplifier (115) coupled to receive the sensing signal and provide first and second differential outputs (116, 117), and a comparator (120) having input transistors (Q27, Q28) coupled to receive outputs from the differential amplifier. The comparator (120) also includes first and second current-mirror loads (Q19/Q21 and Q22/Q20) coupled to the input transistors (Q27, Q28) in a cross coupled configuration to provide hysteresis, wherein the first and second current-mirror loads provide differential drive currents (121,122). An output driver (125) is coupled to receive the differential drive currents (121, 122). An output stage (130) includes at least one output transistor which is coupled to the output driver for providing a digital output for the sensor. A voltage regulator (140) is coupled to receive a supply voltage (VS) and output at least one regulated supply voltage (VREG), wherein the regulated supply voltage is coupled to the sensing structure (105), the differential amplifier (115) and the comparator (120).