Nonvolatile semiconductor memory and data writing method for nonvolatile semiconductor memory

A method having the steps of applying the same gate voltage to each of gate terminals of a plurality of memory cells via word lines to designate the memory cells as a write target, and simultaneously applying a write voltage that corresponds to each write data across drain-source terminals of two or...

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Bibliographische Detailangaben
1. Verfasser: YUDA TAKASHI
Format: Patent
Sprache:eng
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Zusammenfassung:A method having the steps of applying the same gate voltage to each of gate terminals of a plurality of memory cells via word lines to designate the memory cells as a write target, and simultaneously applying a write voltage that corresponds to each write data across drain-source terminals of two or more memory cells that are write targets via bit lines to write simultaneously a plurality of data elements having mutually different data values to the memory cells.