Spread spectrum clock generation device

A spread spectrum controller (20) controls a PLL (10) so that the PLL outputs a spread-spectrum processed clock signal. A loop bandwidth controller (30) controls at least one of a phase detector (11), a loop filter (12), a voltage-controlled oscillator (13), and a frequency divider (14) in the PLL (...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: EBUCHI TSUYOSHI, YAMAMOTO MICHIYO, MURATA KENJI
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:A spread spectrum controller (20) controls a PLL (10) so that the PLL outputs a spread-spectrum processed clock signal. A loop bandwidth controller (30) controls at least one of a phase detector (11), a loop filter (12), a voltage-controlled oscillator (13), and a frequency divider (14) in the PLL (10) during operation of the spread spectrum controller (20) to change a loop bandwidth of the PLL (10).