Step attenuator circuit with improved insertion loss

A step attenuator circuit is mounted on a printed circuit board and has a highpass filter network passing high frequency signals and a lowpass filter network passing low frequency signals. The lowpass network presents a high shunt reactance to the high frequency signals. The lowpass network includes an attenuator network. The attenuator network attenuates the low frequency signals by a specified amount. Parasitic capacitance exists between the highpass network and the attenuator network, causing an amount of electrical energy from the high frequency signals to be absorbed by the attenuator network. A first capacitive circuit is used to compensate for parasitic capacitance. The first compensation circuit is connected across the attenuator network and is coupled to the parasitic capacitance. Consequently, the amount of electrical energy from the high frequency signals absorbed by the attenuator network is reduced, and, as a result, the insertion loss of the step attenuator is reduced.