Phase-changeable memory devices having reduced susceptibility to thermal interference

A non-volatile memory array includes an array of phase-changeable memory elements that are electrically insulated from each other by at least a first electrically insulating region extending between the array of phase-changeable memory elements. The first electrically insulating region includes a plurality of voids therein. Each of these voids extends between a corresponding pair of phase-changeable memory cells in the non-volatile memory array and, collectively, the voids form an array of voids in the first electrically insulating region.