Metal oxide semiconductor transistor with reduced gate height, and related fabrication methods

A metal oxide semiconductor transistor device having a reduced gate height is provided. One embodiment of the device includes a substrate having a layer of semiconductor material, a gate structure overlying the layer of semiconductor material, and source/drain recesses formed in the semiconductor ma...

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Bibliographische Detailangaben
Hauptverfasser: PAL ROHIT, YANG FRANK BIN, LUNING SCOTT
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A metal oxide semiconductor transistor device having a reduced gate height is provided. One embodiment of the device includes a substrate having a layer of semiconductor material, a gate structure overlying the layer of semiconductor material, and source/drain recesses formed in the semiconductor material adjacent to the gate structure, such that remaining semiconductor material is located below the source/drain recesses. The device also includes shallow source/drain implant regions formed in the remaining semiconductor material, and epitaxially grown, in situ doped, semiconductor material in the source/drain recesses.