Semiconductor device structure with strain layer and method of fabricating the semiconductor device structure

A semiconductor device with a strain layer and a method of fabricating the semiconductor device with a strain layer that can reduce a loading effect are provided. By arranging active dummies and gate dummies not to overlap each other, the area of active dummy on which a strain layer dummy will be fo...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: CHOI HYUN-MIN, LEE SEUNG-HWAN, WI SUNG-REY, MAEDA SHIGENOBU, WANGXIAO QUAN, SHIN HEON-JONG
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator CHOI HYUN-MIN
LEE SEUNG-HWAN
WI SUNG-REY
MAEDA SHIGENOBU
WANGXIAO QUAN
SHIN HEON-JONG
description A semiconductor device with a strain layer and a method of fabricating the semiconductor device with a strain layer that can reduce a loading effect are provided. By arranging active dummies and gate dummies not to overlap each other, the area of active dummy on which a strain layer dummy will be formed can be secured, thereby reducing the loading effect.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US7863152B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US7863152B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US7863152B23</originalsourceid><addsrcrecordid>eNqNjLsKAjEQRdNYiPoP8wMW7uKjVhT71XoZk4kZ2GSWZFbx713BWqwOB869UxMbimwlucGqZHD0YEtQNI8-ZIIna_gocoIOX5QBk4NIGsSBePB4y2xROd1Bw7j8eTc3E49docWXMwOn4-VwXlIvLZUeLSXS9tpsd5t6ta72Vf1H8gaLKUMU</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device structure with strain layer and method of fabricating the semiconductor device structure</title><source>esp@cenet</source><creator>CHOI HYUN-MIN ; LEE SEUNG-HWAN ; WI SUNG-REY ; MAEDA SHIGENOBU ; WANGXIAO QUAN ; SHIN HEON-JONG</creator><creatorcontrib>CHOI HYUN-MIN ; LEE SEUNG-HWAN ; WI SUNG-REY ; MAEDA SHIGENOBU ; WANGXIAO QUAN ; SHIN HEON-JONG</creatorcontrib><description>A semiconductor device with a strain layer and a method of fabricating the semiconductor device with a strain layer that can reduce a loading effect are provided. By arranging active dummies and gate dummies not to overlap each other, the area of active dummy on which a strain layer dummy will be formed can be secured, thereby reducing the loading effect.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20110104&amp;DB=EPODOC&amp;CC=US&amp;NR=7863152B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20110104&amp;DB=EPODOC&amp;CC=US&amp;NR=7863152B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHOI HYUN-MIN</creatorcontrib><creatorcontrib>LEE SEUNG-HWAN</creatorcontrib><creatorcontrib>WI SUNG-REY</creatorcontrib><creatorcontrib>MAEDA SHIGENOBU</creatorcontrib><creatorcontrib>WANGXIAO QUAN</creatorcontrib><creatorcontrib>SHIN HEON-JONG</creatorcontrib><title>Semiconductor device structure with strain layer and method of fabricating the semiconductor device structure</title><description>A semiconductor device with a strain layer and a method of fabricating the semiconductor device with a strain layer that can reduce a loading effect are provided. By arranging active dummies and gate dummies not to overlap each other, the area of active dummy on which a strain layer dummy will be formed can be secured, thereby reducing the loading effect.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2011</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjLsKAjEQRdNYiPoP8wMW7uKjVhT71XoZk4kZ2GSWZFbx713BWqwOB869UxMbimwlucGqZHD0YEtQNI8-ZIIna_gocoIOX5QBk4NIGsSBePB4y2xROd1Bw7j8eTc3E49docWXMwOn4-VwXlIvLZUeLSXS9tpsd5t6ta72Vf1H8gaLKUMU</recordid><startdate>20110104</startdate><enddate>20110104</enddate><creator>CHOI HYUN-MIN</creator><creator>LEE SEUNG-HWAN</creator><creator>WI SUNG-REY</creator><creator>MAEDA SHIGENOBU</creator><creator>WANGXIAO QUAN</creator><creator>SHIN HEON-JONG</creator><scope>EVB</scope></search><sort><creationdate>20110104</creationdate><title>Semiconductor device structure with strain layer and method of fabricating the semiconductor device structure</title><author>CHOI HYUN-MIN ; LEE SEUNG-HWAN ; WI SUNG-REY ; MAEDA SHIGENOBU ; WANGXIAO QUAN ; SHIN HEON-JONG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US7863152B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2011</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>CHOI HYUN-MIN</creatorcontrib><creatorcontrib>LEE SEUNG-HWAN</creatorcontrib><creatorcontrib>WI SUNG-REY</creatorcontrib><creatorcontrib>MAEDA SHIGENOBU</creatorcontrib><creatorcontrib>WANGXIAO QUAN</creatorcontrib><creatorcontrib>SHIN HEON-JONG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHOI HYUN-MIN</au><au>LEE SEUNG-HWAN</au><au>WI SUNG-REY</au><au>MAEDA SHIGENOBU</au><au>WANGXIAO QUAN</au><au>SHIN HEON-JONG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device structure with strain layer and method of fabricating the semiconductor device structure</title><date>2011-01-04</date><risdate>2011</risdate><abstract>A semiconductor device with a strain layer and a method of fabricating the semiconductor device with a strain layer that can reduce a loading effect are provided. By arranging active dummies and gate dummies not to overlap each other, the area of active dummy on which a strain layer dummy will be formed can be secured, thereby reducing the loading effect.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US7863152B2
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Semiconductor device structure with strain layer and method of fabricating the semiconductor device structure
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-28T15%3A04%3A19IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CHOI%20HYUN-MIN&rft.date=2011-01-04&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS7863152B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true